The following relates generally to a wafer level packaging (WLP) method for the attachment of glass to a wafer substrate before dicing, and more particularly to a low-cost method to package a CMOS or CCD type image-sensor thereby protecting it from particulate contamination and stress-damage during assembly.
Particle contamination of the microlens or image-sensor during the assembly of microelectronic optical modules can cause the modules to fail. Particles account for as much as ninety percent of the yield loss during the camera module assembly process. With higher resolution devices, the yield loss due to particles increases with smaller pixel sizes. For example, in a 3 Megapixel sensor, the pixel size is less than 2 microns. If a particle may block no more than one pixel before causing deterioration in image quality, then the maximum allowable particle size in this application would be constrained to 2 microns in diameter. In order to limit the number of particles of this dimension, strict particle control measures would be needed during the camera module assembly process to avoid yield loss. These particle containment measures would increase the cost of the assembly operation.
WLP processes help address the contamination issue over existing Chip-on-Board (COB) technology methods. This yield improvement is achieved by protecting the sensor's active area from contamination, using a glass layer, prior to singulation of the wafer and mounting of the device. Since particles that land on the top surface of the glass/lens would be separated from the sensor by the thickness of the glass layer (typically, 0.3 to 0.4 mm), the maximum allowable particle size can be as great as 25 μm in diameter before it causes image deterioration. Also, any units that fail to perform due to particle contamination of the glass surface may be easily recovered by rework. The yield of the camera module assembly process could thus be improved significantly using a wafer level packaging method.
One WLP process that is currently in use (e.g., Tessera's Shellcase CF), bonds a wafer-sized glass plate on the top of cavity walls on the sensor side of the wafer thus creating an optical cavity over each sensor. This step is followed by glass singulation and back-grinding of the wafer. Finally, the wafer is singulated into individual devices. While this process has shown improvement in yield over COB processes, it may generate high stress on the circuitry inside the silicon, which may give rise to yield loss.
Another WLP process (e.g., Schott OPTO-WLP) also shows some advantages in yield management. The first step in this process is the protection of sensitive active structures by a glass cover. A specialized adhesive wafer bonding process enables selective coverage of the adhesive within the bond layer. In the next step, the bonded silicon-glass sandwich is thinned from the silicon side (backside). The next steps involve etching vias into the silicon side to open the bond pads to the back of the wafer, redistribution of the contacts to the backside of the wafer and ball attachment. The process thus needs via/street formation, multiple layers of leads/insulation material and many of the process steps heavily rely on manual trial and error methods. As a result, the lead-time is quite long and process instability may result, when using this process.
It is against this background that the present invention has been developed.